This invention relates generally to digital signal and graphics processors.
A digital signal processor generally modifies or analyzes information measured as a discrete sequence of numbers. Digital signal processors are utilized for a wide variety of signal processing applications such as television, multimedia, audio, digital imaging processing and telephony as examples. Most of these applications involve a certain amount of mathematical manipulation, usually multiplying and adding signals.
A large number of digital signal processors are available from a large number of vendors. Generally, each of these processors is fixed in the sense that it comes with certain capabilities. The users attempt to acquire those processors which best fit their needs and budget. However, the user's ability to modify the overall architecture of the digital signal processor is relatively limited. Thus, these products are packaged as units having generally fixed and immutable sets of capabilities.
In a number of cases, it would be desirable to have the ability to create a digital signal processor that performs complex functions that are specifically adapted to particular problems to be solved. Thus, it would be desirable that the hardware or software of the digital signal processor be adaptable to a particular function. However, such a digital signal processor might enjoy relatively limited market. Given the investment in silicon processing, it may not be feasible to provide the digital signal processor that has been designed to meet relatively specific needs. However, such a device would be highly desirable. It would provide the greatest performance for the expense incurred, since only those features that are needed are provided. Moreover, those features may be provided that result in the highest performance without unduly increasing costs.
Processor speed has increased dramatically over the last few years. However, the ability of memories to keep track with high speed processors has lagged. One way to get around this problem is to use caches. However, caches do not work well when the data is usually different. Thus, systems that work with data intense operations generally do not scale in speed with improving processor speed.
In addition, many processing devices access memory at a high frequency. Each time memory is accessed, the system processing time is decreased. Moreover, memory accesses commonly result in power consumption. In some battery operated systems, it would be desirable to reduce power consumption. Therefore, it would be desirable to find a way to reduce the number of memory accesses in the course of a processing routine.
Thus, there is a need for a processor that is readily adaptable to handling a variety of intense data manipulation operations.